IRIS Graphics



There is next to no information on the old Motorola based IRIS systems made by Silicon Graphics in the early 80s. This is an attempt to collect the few information that is available on their graphics hardware.

The IRIS systems were equipped with Motorola 680x0 processors and used Multibus as a bus-system. The graphics hardware featured Geometry Engines, which are special purpose VLSI processors for graphics processing.


Geometry Processing

The Geometry system is composed of three subsystems each of which is composed of Geometry Engines. This means each GE in this pipeline has a special purpose - depending on which subsystem it belongs to:

  • 4 Matrix Engines
  • 4-6 Clipper Engines
  • 2 Scaler Engines


Original IRIS Graphics

This is the graphics hardware which was used for IRIS 1000 and non-Turbo 2000 systems before August 1985.

  • GF1 Geometry Engine board (6 MHz Geometry Engine)
  • UC3 Update Controller board
  • BP2 BitPlane board
  • DC3 Display Controller board

Enhanced IRIS Graphics

This enhanced version of the graphics hardware was used with IRIS 2000 from August 1985 on and IRIS 3000 systems.

  • GF2 Geometry Engine board (8 MHz Geometry Engine)
  • UC4 Update Controller board
  • BP3 BitPlane board
  • DC4 Display Controller board

According to the IRIS FAQ there have been two versions of this graphics subsystem - one with 10 Geometry Engines and another with 12 Geometry Engine processors.




Enhanced IRIS

GF2 board.

BP3 board.

BP3 board.

BP3 board.

DC4 board.

UC4 board